Universal Remote Control R7 - SPECS SHEET User Manual Page 16
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ADP5589 Data Sheet
Rev. B | Page 16 of 52
LOGIC BLOCKS
Several of the ADP5589 I/O lines can be used as inputs and
outputs for implementing some common logic functions.
The R1, R2, and R3 I/O pins can be used as inputs, and the R0
I/O pin can be used as an output for Logic Block 1.
The C8, C7, and C6 I/O pins can be used as inputs, and the C9
I/O pin can be used as an output, for Logic Block 2. It is also
possible to cascade the output of Logic Block 1 as an alternate
input for Logic Block 2 (LY1 is used instead of LA2).
The outputs from the logic blocks can be configured to generate
interrupts. They can also be configured to generate events on
the FIFO. The LCK_TRK_LOGIC (0x4D[4]) bit can be used
to allow logic events (programmed for FIFO updating) to be
tracked when the keypad is locked.
Figure 21 and Figure 22 show detailed diagrams of the internal
make-up of each logic block, illustrating the possible logic
functions that can be implemented.
GPI EVENT
I
2
C BUSY?
KEY EVENT
LOGIC EVENT
(R1) LA1
LC1
LB1
LA1_INV
LOGIC
EVENT/INT
GENERATOR
D
CLR
Q
SET
LB1_INV
LC1_INV
FF1_SET
FF1_CLR
R3_EXTEND_CFG[1:0]
LOGIC1_SEL[2:0]
LY1_INV
LA2_INV
LB2_INV
LC2_INV
FF2_SET
FF2_CLR
C6_EXTEND_CFG
LOGIC2_SEL[2:0]
LY2_INV
(R2)
(R3)
(C8) LA2
LC2
LB2
(C7)
(C6)
LOGIC BLOCK1
LOGIC BLOCK2
LY1 (R0)
LY2 (C9)
LOGIC1_INT
LOGIC2_INT
LOGIC1_INT_LEVEL
FIFO
UPDATE
LOGIC2_INT_LEVEL
LOGIC1_EVENT_EN
LOGIC2_EVENT_EN
OVRFLOW_INT
EVENT_INT
LCK_TRK_LOGIC
RESET_TRIGGER_TIME[2:0]
RESET1_EVENT_A[7:0]
RESET1_EVENT_B[7:0]
RESET1_EVENT_C[7:0]
RESET2_EVENT_A[7:0]
RESET2_EVENT_B[7:0]
FIFO
EC[4:0]
D
CLR
Q
SET
09714-019
Figure 20. Logic Blocks Overview
LA1_INV
MUX
000
001
SEL[2:0]
OUT
010
011
100
101
110
111
SEL
OUT
0
1
GND
AND1
OR1
XOR1
FF1
IN_LA1
IN_LB1
IN_LC1
LA1
LA1
LA1
IN_LA1
SEL
OUT
0
1
AND1
IN_LA1
IN_LB1
IN_LC1
R3_EXTEND_CFG[1:0] = 01
LOGIC1_SEL[2:0]
LY1_INV
SEL
OUT
0
1
LY1
LY1
LY1
LB1_INV
SEL
OUT
0
1
LB1
LB1
LB1
IN_LB1
LC1_INV
SEL
OUT
0
1
LC1
LC1
LC1
IN_LC1
FF1_SET
FF1_CLR
SEL
OUT
0
1
OR1
IN_LA1
IN_LB1
IN_LC1
AND
AND
OR
OR
SEL
OUT
0
1
XOR1
IN_LA1
IN_LB1
IN_LC1
IN_LA1
IN_LB1
IN_LC1
XOR
XOR
D
CLR
Q
SET
0
1
SEL
OUT
09714-020
FF1
Figure 21. Logic Block 1
- ADP5589 1
- TABLE OF CONTENTS 2
- SPECIFICATIONS 3
- ABSOLUTE MAXIMUM RATINGS 5
- QUICK DEVICE OVERVIEW 7
- 9714-004 7
- DEVICE ENABLE 8
- DEVICE OVERVIEW 8
- EVENT FIFO 9
- KEY SCAN CONTROL 9
- Rev. B 10
- KEY PRESSED 10
- 09714-009 10
- Data Sheet ADP5589 11
- ADP5589 Data Sheet 12
- Key Pad Extension 12
- Ghosting 12
- FIFO Lock/Unlock 12
- GPI Input 15
- REGISTER INTERFACE 19
- REGISTER MAP 21
- ID Register 0x00 23
- INT_STATUS Register 0x01 23
- Status Register 0x02 23
- FIFO_1 Register 0x03 24
- Rev. B 25
- Rev. B 26
- GPI_INT_STAT_A Register 0x13 27
- GPI_INT_STAT_B Register 0x14 27
- GPI_INT_STAT_C Register 0x15 27
- GPI_STATUS_A Register 0x16 28
- GPI_STATUS_B Register 0x17 28
- GPI_STATUS_C Register 0x18 28
- RPULL_CONFIG_A Register 0x19 29
- RPULL_CONFIG_B Register 0x1A 29
- RPULL_CONFIG_C Register 0x1B 30
- RPULL_CONFIG_D Register 0x1C 30
- RPULL_CONFIG_E Register 0x1D 31
- GPI_EVENT_EN_A Register 0x21 32
- GPI_EVENT_EN_B Register 0x22 33
- GPI_EVENT_EN_C Register 0x23 33
- DEBOUNCE_DIS_A Register 0x27 35
- DEBOUNCE_DIS_B Register 0x28 35
- DEBOUNCE_DIS_C Register 0x29 36
- GPO_DATA_OUT_A Register 0x2A 36
- GPO_DATA_OUT_B Register 0x2B 36
- GPO_DATA_OUT_C Register 0x2C 37
- GPO_OUT_MODE_A Register 0x2D 37
- GPO_OUT_MODE_B Register 0x2E 37
- GPO_OUT_MODE_C Register 0x2F 38
- UNLOCK1 Register 0x33 39
- UNLOCK2 Register 0x34 39
- EXT_LOCK_EVENT Register 0x35 39
- UNLOCK_TIMERS Register 0x36 40
- LOCK_CFG Register 0x37 40
- RESET1_EVENT_A Register 0x38 40
- RESET1_EVENT_B Register 0x39 40
- RESET1_EVENT_C Register 0x3A 41
- RESET2_EVENT_A Register 0x3B 41
- RESET2_EVENT_B Register 0x3C 41
- RESET_CFG Register 0x3D 41
- PWM_OFFT_LOW Register 0x3E 42
- PWM_OFFT_HIGH Register 0x3F 42
- PWM_ONT_LOW Register 0x40 42
- PWM_ONT_HIGH Register 0x41 42
- PWM_CFG Register 0x42 42
- CLOCK_DIV_CFG Register 0x43 43
- LOGIC_1_CFG Register 0x44 43
- LOGIC_2_CFG Register 0x45 43
- LOGIC_FF_CFG Register 0x46 44
- POLL_TIME_CFG Register 0x48 44
- PIN_CONFIG_A Register 0x49 45
- PIN_CONFIG_B Register 0x4A 45
- PIN_CONFIG_C Register 0x4B 45
- PIN_CONFIG_D Register 0x4C 46
- GENERAL_CFG_B Register 0x4D 46
- INT_EN Register 0x4E 47
- APPLICATION DIAGRAM 48
- OUTLINE DIMENSIONS 49
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