Universal Remote Control R7 - SPECS SHEET User Manual Page 41
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Data Sheet ADP5589
Rev. B | Page 41 of 52
RESET1_EVENT_C Register 0x3A
Table 66. RESET1_EVENT_C Bit Descriptions
Bits Name R/W Description
7 RESET1_EVENT_B Level R/W Defines which level the third reset event should be.
[6: 0] RESET1_EVENT_C[6:0] R/W Defines an event that can be used to generate the RESET1 signal.
RESET2_EVENT_A Register 0x3B
Table 67. RESET2_EVENT_A Bit Descriptions
Bits Name R/W Description
7
RESET1_EVENT_B Level
R/W
Defines which level the first reset event should be.
For key events:
0 = not applicable; releases not used for reset generation.
1 = press is used as reset event.
For GPIs and logic outputs configured for FIFO updates:
0 = inactive event used as reset condition.
1 = active event used as reset condition.
[6:0] RESET2_EVENT_A[6:0] R/W Defines an event that can be used to generate the RESET2 signal.
Up to two events can be defined for generating the RESET2 signal, using
RESET2_EVENT_A[6:0] and RESET2_EVENT_B[6:0].
If one of the registers is 0, that register is not used for reset generation. All reset events
must be detected at the same time to trigger the reset.
RESET2_EVENT_B Register 0x3C
Table 68. RESET2_EVENT_B Bit Descriptions
Bits Name R/W Description
7
RESET1_EVENT_B Level
R/W
Defines which level the second reset event should be.
[6:0] RESET2_EVENT_B[6:0] R/W Defines an event that can be used to generate the RESET2 signal.
RESET_CFG Register 0x3D
Table 69. RESET_CFG Bit Descriptions
Bits Name R/W Description
7 RESET2_POL R/W Sets the polarity of RESET2.
0 = RESET2 is active low.
1 = RESET2 is active high.
6 RESET1_POL R/W Sets the polarity of RESET1.
0 = RESET1 is active low.
1 = RESET1 is active high.
5
RST_PASSTHRU_EN
R/W
Allows the RST pin to override (OR with) the RESET1signal.
Function not applicable to RESET2.
[4:2]
RESET_TRIGGER_TIME[2:0]
R/W
Defines the length of time that the reset events must be active before a reset signal is
generated.
All events must be active at the same time for the same duration. Parameter common
to both RESET1 and RESET2.
000 = immediate.
001 = 1.0 sec.
010 = 1.5 sec.
011 = 2.0 sec.
100 = 2.5 sec.
101 = 3.0 sec.
110 = 3.5 sec.
111 = 4.0 sec.
- ADP5589 1
- TABLE OF CONTENTS 2
- SPECIFICATIONS 3
- ABSOLUTE MAXIMUM RATINGS 5
- QUICK DEVICE OVERVIEW 7
- 9714-004 7
- DEVICE ENABLE 8
- DEVICE OVERVIEW 8
- EVENT FIFO 9
- KEY SCAN CONTROL 9
- Rev. B 10
- KEY PRESSED 10
- 09714-009 10
- Data Sheet ADP5589 11
- ADP5589 Data Sheet 12
- Key Pad Extension 12
- Ghosting 12
- FIFO Lock/Unlock 12
- GPI Input 15
- REGISTER INTERFACE 19
- REGISTER MAP 21
- ID Register 0x00 23
- INT_STATUS Register 0x01 23
- Status Register 0x02 23
- FIFO_1 Register 0x03 24
- Rev. B 25
- Rev. B 26
- GPI_INT_STAT_A Register 0x13 27
- GPI_INT_STAT_B Register 0x14 27
- GPI_INT_STAT_C Register 0x15 27
- GPI_STATUS_A Register 0x16 28
- GPI_STATUS_B Register 0x17 28
- GPI_STATUS_C Register 0x18 28
- RPULL_CONFIG_A Register 0x19 29
- RPULL_CONFIG_B Register 0x1A 29
- RPULL_CONFIG_C Register 0x1B 30
- RPULL_CONFIG_D Register 0x1C 30
- RPULL_CONFIG_E Register 0x1D 31
- GPI_EVENT_EN_A Register 0x21 32
- GPI_EVENT_EN_B Register 0x22 33
- GPI_EVENT_EN_C Register 0x23 33
- DEBOUNCE_DIS_A Register 0x27 35
- DEBOUNCE_DIS_B Register 0x28 35
- DEBOUNCE_DIS_C Register 0x29 36
- GPO_DATA_OUT_A Register 0x2A 36
- GPO_DATA_OUT_B Register 0x2B 36
- GPO_DATA_OUT_C Register 0x2C 37
- GPO_OUT_MODE_A Register 0x2D 37
- GPO_OUT_MODE_B Register 0x2E 37
- GPO_OUT_MODE_C Register 0x2F 38
- UNLOCK1 Register 0x33 39
- UNLOCK2 Register 0x34 39
- EXT_LOCK_EVENT Register 0x35 39
- UNLOCK_TIMERS Register 0x36 40
- LOCK_CFG Register 0x37 40
- RESET1_EVENT_A Register 0x38 40
- RESET1_EVENT_B Register 0x39 40
- RESET1_EVENT_C Register 0x3A 41
- RESET2_EVENT_A Register 0x3B 41
- RESET2_EVENT_B Register 0x3C 41
- RESET_CFG Register 0x3D 41
- PWM_OFFT_LOW Register 0x3E 42
- PWM_OFFT_HIGH Register 0x3F 42
- PWM_ONT_LOW Register 0x40 42
- PWM_ONT_HIGH Register 0x41 42
- PWM_CFG Register 0x42 42
- CLOCK_DIV_CFG Register 0x43 43
- LOGIC_1_CFG Register 0x44 43
- LOGIC_2_CFG Register 0x45 43
- LOGIC_FF_CFG Register 0x46 44
- POLL_TIME_CFG Register 0x48 44
- PIN_CONFIG_A Register 0x49 45
- PIN_CONFIG_B Register 0x4A 45
- PIN_CONFIG_C Register 0x4B 45
- PIN_CONFIG_D Register 0x4C 46
- GENERAL_CFG_B Register 0x4D 46
- INT_EN Register 0x4E 47
- APPLICATION DIAGRAM 48
- OUTLINE DIMENSIONS 49
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