Universal Remote Control R7 - SPECS SHEET User Manual

Keypad Decoder and I/O Expansion Data Sheet ADP5589 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate an

ADP5589 Data Sheet Rev. B | Page 10 of 52 KEYSCANCONTROL12 345 678 9VDDR0 R1R2C2C0C13 × 3 KEYPAD MATRIX09714-008 Figure 9. Simplified Key Scan Block

Data Sheet ADP5589 Rev. B | Page 11 of 52 LOGIC EVENT567891011432116 17 18 19 20 21 221514131227 28 29 30 31 32 332625242338 39 40 41 42 43 443736353

ADP5589 Data Sheet Rev. B | Page 12 of 52 KEY 32KEY 32 PRESS KEY 32 RELEASEKEY SCANEVENT_INTEVENT_INT CLEAREDEC[4:0]FIFOFIFOREAD00000000FIFO100032000

Data Sheet ADP5589 Rev. B | Page 13 of 52 When full unlock is achieved, FIFO and event count updates resume. Note that if a key press is used as the

ADP5589 Data Sheet Rev. B | Page 14 of 52 NOFIRSTUNLOCKEVENT?UNLOCKTIMERENABLED?SECONDUNLOCK EVENTREQUIRED?START UNLOCK TIMERUNLOCKTIMEREXPIRED?UNLO

Data Sheet ADP5589 Rev. B | Page 15 of 52 GPI Input Each of the 19 I/O lines can be configured as a general-purpose logic input line. Figure 17 show

ADP5589 Data Sheet Rev. B | Page 16 of 52 LOGIC BLOCKS Several of the ADP5589 I/O lines can be used as inputs and outputs for implementing some comm

Data Sheet ADP5589 Rev. B | Page 17 of 52 LA2_INVMUX000001SEL[2:0]OUT010011100101110111SELOUT01GNDAND2OR2XOR2FF2IN_LA2IN_LB2IN_LC2(LY1)LA2(LY1)LA2(I

ADP5589 Data Sheet Rev. B | Page 18 of 52 RESET_PULSE_WIDTH[1:0]RESET_TRIGGER_TIME[2:0]RESET1_EVENT_A[7:0]RESET1_EVENT_B[7:0]RESET1_EVENT_C[7:0]KEYS

Data Sheet ADP5589 Rev. B | Page 19 of 52 REGISTER INTERFACE Register access of the ADP5589 is acquired via its I2C-compatible serial interface. The

ADP5589 Data Sheet Rev. B | Page 2 of 52 TABLE OF CONTENTS Features ...

ADP5589 Data Sheet Rev. B | Page 20 of 52 Figure 30 shows a typical multibyte read sequence for reading internal registers. The cycle begins with a s

Data Sheet ADP5589 Rev. B | Page 21 of 52 REGISTER MAP Table 6. Addr. R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x00 R MAN_ID

ADP5589 Data Sheet Rev. B | Page 22 of 52 Addr. R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x33 R/W UNLOCK1_ STATE UNLOCK1[6:0]

Data Sheet ADP5589 Rev. B | Page 23 of 52 DETAILED REGISTER DESCRIPTIONS Note: N/A throughout this section means not applicable. Note: All registers

ADP5589 Data Sheet Rev. B | Page 24 of 52 FIFO_1 Register 0x03 Table 10. FIFO_1 Bit Descriptions Bits Name R/W Description 7 Event1_State R Th

Data Sheet ADP5589 Rev. B | Page 25 of 52 FIFO_2 Register 0x04 Table 12. FIFO_2 Bit Descriptions Bits Name R/W Description 7 Event2_State R Re

ADP5589 Data Sheet Rev. B | Page 26 of 52 FIFO_10 Register 0x0C Table 20. FIFO_10 Bit Descriptions Bits Name R/W Description 7 Event10_State R

Data Sheet ADP5589 Rev. B | Page 27 of 52 GPI_INT_STAT_A Register 0x13 Table 27. GPI_INT_STAT_A Bit Descriptions Bits Name R/W Description 7 GPI

ADP5589 Data Sheet Rev. B | Page 28 of 52 GPI_STATUS_A Register 0x16 Table 30. GPI_STATUS_A Bit Descriptions Bits Name R/W Description 7 GPI_8_S

Data Sheet ADP5589 Rev. B | Page 29 of 52 RPULL_CONFIG_A Register 0x19 Table 33. RPULL_CONFIG_A Bit Descriptions Bits Name R/W Description [7:6]

Data Sheet ADP5589 Rev. B | Page 3 of 52 SPECIFICATIONS VDD = 1.8 V to 3.3 V, TA = −40°C to +85⁰C, unless otherwise noted.1 Table 1. Parameter Sym

ADP5589 Data Sheet Rev. B | Page 30 of 52 RPULL_CONFIG_C Register 0x1B Table 35. RPULL_CONFIG_C Bit Descriptions Bits Name R/W Description [7 :6]

Data Sheet ADP5589 Rev. B | Page 31 of 52 RPULL_CONFIG_E Register 0x1D Table 37. RPULL_CONFIG_E Bit Descriptions Bits Name R/W Description [7: 6]

ADP5589 Data Sheet Rev. B | Page 32 of 52 GPI_INT_LEVEL_B Register 0x1F Table 39. GPI_INT_LEVEL_B Bit Descriptions Bits Name R/W Description 7 G

Data Sheet ADP5589 Rev. B | Page 33 of 52 GPI_EVENT_EN_B Register 0x22 Table 42. GPI_EVENT_EN_B Bit Descriptions Bits Name R/W Description 7 GPI

ADP5589 Data Sheet Rev. B | Page 34 of 52 0 GPI_1_INT_EN R/W 0 = GPI_1_INT is disable. 1 = GPI_1_INT enable. Assert the GPI_INT bit (Register 0x0

Data Sheet ADP5589 Rev. B | Page 35 of 52 DEBOUNCE_DIS_A Register 0x27 Table 47. DEBOUNCE_DIS_A Bit Descriptions Bits Name R/W Description 7 GPI

ADP5589 Data Sheet Rev. B | Page 36 of 52 DEBOUNCE_DIS_C Register 0x29 Table 49. DEBOUNCE_DIS_C Bit Descriptions Bits Name R/W Description [7:3]

Data Sheet ADP5589 Rev. B | Page 37 of 52 GPO_DATA_OUT_C Register 0x2C Table 52. GPO_DATA_OUT_C Bit Descriptions Bits Name R/W Description [7: 3]

ADP5589 Data Sheet Rev. B | Page 38 of 52 GPO_OUT_MODE_C Register 0x2F Table 55. GPO_OUT_MODE_C Bit Descriptions Bits Name R/W Description [7: 3]

Data Sheet ADP5589 Rev. B | Page 39 of 52 GPIO_DIRECTION_C Register 0x32 Table 58. GPIO_DIRECTION_C Bit Descriptions Bits Name R/W Description [7

ADP5589 Data Sheet Rev. B | Page 4 of 52 Parameter Symbol Test Conditions/Comments Min Typ Max Unit Hold Time for Start/Repeated Start tHD; S

ADP5589 Data Sheet Rev. B | Page 40 of 52 UNLOCK_TIMERS Register 0x36 Table 62. UNLOCK_TIMERS Bit Descriptions Bits Name R/W Description [7: 3]

Data Sheet ADP5589 Rev. B | Page 41 of 52 RESET1_EVENT_C Register 0x3A Table 66. RESET1_EVENT_C Bit Descriptions Bits Name R/W Description 7 RES

ADP5589 Data Sheet Rev. B | Page 42 of 52 Bits Name R/W Description [1:0] RESET_PULSE_WIDTH[1:0] R/W Defines the pulse width of the reset sign

Data Sheet ADP5589 Rev. B | Page 43 of 52 CLOCK_DIV_CFG Register 0x43 Table 75. CLOCK_DIV_CFG Bit Descriptions Bits Name R/W Description 7 R

ADP5589 Data Sheet Rev. B | Page 44 of 52 Bits Name R/W Description [2: 0] LOGIC2_SEL[2:0] R/W Configures the digital mux for Logic Block 2. 0

Data Sheet ADP5589 Rev. B | Page 45 of 52 PIN_CONFIG_A Register 0x49 Table 81. PIN_CONFIG_A Bit Descriptions Bits Name R/W Description 7 R7_CONF

ADP5589 Data Sheet Rev. B | Page 46 of 52 PIN_CONFIG_D Register 0x4C Table 84. PIN_CONFIG_D Bit Descriptions Bits Name R/W Description 7 PULL_SE

Data Sheet ADP5589 Rev. B | Page 47 of 52 INT_EN Register 0x4E Table 86. INT_EN Bit Descriptions Bits Name R/W Description [7: 6] Reserved.

ADP5589 Data Sheet Rev. B | Page 48 of 52 APPLICATION DIAGRAM SDASCLRSTINTVDDSDA SCL RSTINTI/OCONFIGKEY SCANANDDECODEGPI SCANANDDECODELOGIC1LOGIC2CL

Data Sheet ADP5589 Rev. B | Page 49 of 52 OUTLINE DIMENSIONS 0.40BSC0.500.400.300.250.200.15COMPLIANTTOJEDEC STANDARDS MO-220-WFFE.BOTTOM VIEWTOP VIE

Data Sheet ADP5589 Rev. B | Page 5 of 52 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating VDD to Ground –0.3 V to 4 V SCL, SDA, RST, INT, R0, R

ADP5589 Data Sheet Rev. B | Page 50 of 52 NOTES

Data Sheet ADP5589 Rev. B | Page 51 of 52 NOTES

ADP5589 Data Sheet Rev. B | Page 52 of 52 NOTES I2C refers to a communications protocol originally developed by

ADP5589 Data Sheet Rev. B | Page 6 of 52 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 09714-003213456181716151413R2R3R4R5NOTES1. THE EXPOSEDPAD MUST B

Data Sheet ADP5589 Rev. B | Page 7 of 52 QUICK DEVICE OVERVIEW ROW 0SDAFIFOUPDATEUVLOPORI2C INTERFACEI2C BUSY?OSCILLATORREGISTERSKEY SCANANDDECODEGPI

ADP5589 Data Sheet Rev. B | Page 8 of 52 DEVICE ENABLE When sufficient voltage is applied to VDD and the RST pin is driven with a logic high level,

Data Sheet ADP5589 Rev. B | Page 9 of 52 DETAILED DESCRIPTION EVENT FIFO It is important to understand the function of the event FIFO. The ADP5589 f